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5-2-1 CoWoS Architecture Universe: Photomask Limits and TSMC's Process Magic
TSMC's CoWoS resolves AI chip bottlenecks, tackling thick substrate signal loss. It uses silicon interposers as micro-highways for high-density TSV/lithography. The article details CoW/oS processes, explaining TSMC's high-value dominance and substrate assembly outsourcing. This precision engineer...
5-1-11 The Final Battle: The Red Wolf Pack Under the City Walls and a Panoramic Map of Semiconductor Packaging
Semiconductor packaging & testing competition analyzed. Chinese 'red-chip' firms (JCET, Tongfu, Unisilicon) challenge traditional giants via asymmetric strategies. Tech mapping from traditional to 3D heterogeneous integration shows packaging evolving to extend Moore's Law via 'brain surgery.' Thi...
5-1-10 OSAT Giants' Counterattack Defense Line: ASE Technology Holding (ASE) and Amkor's VIPack
OSAT firms counter TSMC's lead & China's price wars. ASE builds a moat via LEAP/VIPack, with flexible capacity & heterogeneous integration. Amkor targets high-end auto/US clients; Powertech focuses on HBM. All shift to system integration, pursuing AI breakthroughs.
5-1-9 The Vanishing Boundaries of Business Warfare: TSMC's Dimension-Reduction Strike
TSMC's InFO blurs foundry/OSAT lines. Its nanoscale process launched a 'dimension-reduction strike,' eliminating substrates for ultra-thinness. Co-design linked front/back processes, overcame bottlenecks, built high tech barriers/customer stickiness, reshaping semiconductor competition.
5-1-6 The Immortal Veteran and Its Limits: Lead Frame, Die Bond, and Wire Bond
Lead frame packaging status. Advanced packaging a focus, but 80% of chips rely on cost-effective lead frames. Taiwan's 'Three Musketeers' (Shuen De, Chang Wah Electromaterials, Jielin) solidify market via metallurgy, M&A, power modules. Die/wire bond challenges. Efficiency/physical limits positio...
5-1-4 Microsurgery for Overcoming Distance: Bumping (Long Bump)'s Material Evolution
Article analyzes advanced packaging's 'long bump' process, key for efficient AI chip transmission. Materials evolved from solder balls to stable copper pillars due to miniaturization/heat. This sparked a TSMC-ASE power struggle, driving capacity gains for wet process suppliers (Grand Plastic, Sci...
