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The EDGE Semiconductor Research Zone provides in-depth analysis of the global chip industry's complex supply chain, from FinFET to silicon photonics. We cover AI, geopolitics, and rapid tech iteration with continuously updated insights, empowering you to master critical variables and make informed decisions.

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2-4-4 The 'Bathwater' of Wafers —— Wet Process and Taiwan's Alchemy
Semiconductor
EDGE / / 7 minutes read

2-4-4 The 'Bathwater' of Wafers —— Wet Process and Taiwan's Alchemy

Wafer production is 30% cleaning; PPT-pure chemicals are vital, or nanoparticles destroy yield. Beyond TMAH developer and Piranha solution (SPM), containers and recycling are key. UPC masters Teflon-lined technology for uncontaminated chemical delivery; SCF purifies and regenerates waste liquids,...
2-4-3 The Soul of Photolithography —— Photoresist and the Japanese Empire
Semiconductor
EDGE / / 10 minutes read

2-4-3 The Soul of Photolithography —— Photoresist and the Japanese Empire

Photoresist is lithography's soul. EUV's RLS impossibility triangle (resolution, roughness, sensitivity) requires CAR/MOR breakthroughs. 90% of market monopolized by 5 Japanese firms (JSR, Shin-Etsu); JSR's privatization is a national strategy. Most Taiwanese firms distribute. Only Topco uses R&D...
2-4-1 The Film of the Battlefield: Photomask Technology (Photomask)
Semiconductor
EDGE / / 9 minutes read

2-4-1 The Film of the Battlefield: Photomask Technology (Photomask)

EUV photomasks use 80-layer MoSi mirrors; atomic defects challenge interference focusing. TSMC initially skipped pellicles for yield, now using carbon nanotubes. A 3nm photomask costs NT$1B. NRE makes advanced processes a giant oligopoly; small fabs use MPW.
2-3-2 The Final Gamble — Intel 14A vs. TSMC A16: The Roadmap Battle
Semiconductor
EDGE / / 7 minutes read

2-3-2 The Final Gamble — Intel 14A vs. TSMC A16: The Roadmap Battle

ASML's High-NA EUV boosts resolution via anamorphic lenses, halving exposure fields and causing chip stitching. This sparks a battle: Intel bets on new machines for tech lead; TSMC uses older machines, multi-patterning for cost/yield. Photoresists need metallic scaffolds. Short-term, TSMC wins av...
2-3-1 God's Paintbrush —— The ASML EUV Ecosystem and Its Miracles
Semiconductor
EDGE / / 10 minutes read

2-3-1 God's Paintbrush —— The ASML EUV Ecosystem and Its Miracles

ASML's $4.8B EUV lithographer: industry's crown jewel. Lasers bombard tin 50k/s, producing 13.5nm EUV. Light easily absorbed; Zeiss mirrors guide 2% to wafer. Monopoly: Lasertec (Japan/inspection), Gudeng (Taiwan/reticle pods). 100k precision parts integration hinders China's replication. Moore's...
2-2-0 Photolithography in Plain Language: A Nanoscale 'Template Spray Painting' Game
Semiconductor
EDGE / / 7 minutes read

2-2-0 Photolithography in Plain Language: A Nanoscale 'Template Spray Painting' Game

Gemini said: Photolithography is nanoscale template spray-painting. We coat a wafer with photoresist, then light through a mask alters it. Unwanted resist is washed off, leaving a protective layer. Exposed wafer areas are then etched. After stripping the resist, circuit structures are created. Th...